Papilio FPGA Logic Analyzer Bundle

Overview

The Papilio FPGA Logic Analyzer (PLA) kit is a fully featured logic analyzer that has its roots in the Open Bench Logic Sniffer (OLS) project. We took all the tricks we learned from designing the FPGA side of the Logic Sniffer and applied them to the PLA, expanding the memory, increasing transfer speeds, providing 32 5V tolerant channels, and making it available for debugging internal FPGA designs. It's a more capable platform that enables us to continue developing all of the Logic Analyzer features that just wouldn't fit in the Logic Sniffer. Not only is the PLA a very capable Logic Analzyer, it's also an awesome FPGA development board! You can use the Logic Analyzer to debug circuits by day, and use the Papilio FPGA to make System on Chip designs by night!

What You Get 

• Two 5V tolerant 16 bit bidirectional I/O buffer Wings
• A 10 wire Female-to-Male cable.
• A 10 wire Female-to-Female cable.
• One test clip connectors

ADDONS:

• In addition to the basic Logic Analyzer Kit components you can choose one of our Papilio FPGA boards to get a fully featured Logic Analyzer.
• You also have the option to add a second test clip connectors

Specifications

• 32 Channels at speeds up to 100Mhz
• 16 Channels at speeds up to 200Mhz
• 32 0-5V Tolerant Input Pins - Up to 7V for short periods
• 24KB memory space on Papilio One boards
• 64KB memory space on Papilio Pro and Papilio DUO boards
• Data is uploaded over your computer's USB port

Software

The software is an Open Source and cross platform Java client that works on Windows, Linux, and OSX. The client is integrated into our DesignLab software and if you use the FPGA for other tasks it just takes two clicks to get back to Logic Analzyer functionality. The Logic Analyzer is always just two clicks away!

Software Features

Analog Waveform viewer:

Measurement Tool - Easily measure frequency and period:

Pulse Counter:

Channel Group Summary in Hexadecimal:

There are many, many more nice features, too many to show here.

Protocol Analyzers

The strength of the Papilio Logic Analyzer is the ability to decode and analyze different protocols, it is packed with decoder plugins!

UART Decoder - Decode Serial/Com ports with ease.

SPI Decoder - see exactly what is on your SPI bus.

I2C Decoder

Many More Decoder Plugins 

1-Wire Decoder, ASM45 Decoder, DMX512 Decoder, JTAG Decoder, Line Decoder, State Analyzer

Compare Options

Unique Benefits

Not only do you get a Logic Analyzer but you get a full FPGA development board with a growing library of Open Source FPGA "Chips" that you can use to draw Circuits using our DesignLab software. Even more exciting is the ability to embed the Logic Analyzer inside your FPGA circuit designs and probe and debug connections inside the FPGA!

How is memory allocated

This video explains how the memory is allocated when you select multiple 8-bit channel groups.

Tutorials

• Getting Started